Stage 1 Loader 1.0.5.0 (build 54486) Built: 2016-04-05 at 06:54:55 Secure Boot Enabled on the Processor Bank: Primary CPLD: rev: 3.0 (30:0060|32:0002|33:0000|34:0000|35:0000) PRID: 000C1203 POWER ON RESET CFG:924C0FB2 Initialized I2C0 Controller. Initialized I2C1 Controller. SPD Rev:0x12 DIMM:0 Type:2 Speed:666MHz #Rank:1 DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM set freq:666666 DDR3: Node 0 DRAM frequency 666 MHz DDR3: Node 0 CPU frequency 1600 MHz mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9 AP3:A0CFFF0 ODTP1:10000 Board DDR VDD set to 1.5V. N:0 CH:0 additional rdlvl rdly:1 N:0 Ch:0 m:32 s:32 R OK. Rank:0 HW WLVL Passed Mask:1FF AP3:A0CFFF0 ODTP1:10000 n:0 ch:0 RTT WR:0200 ===N:0 Ch:0 m:32 s:32 RW OK. Starting address/cmd align [4T..3T] N:0 CH:0 SR ADDR/CMD:(B:00 E:63 00) 31 N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:4T OK N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:3T OK n:0 ch:0 addr mode:3T OK Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- FAIL =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:FFFFFFFF TGED1 [059]:FFFFFFFF TGED2 [05A]:FFFFFFFF TGED3 [05B]:FFFFFFFF TGED4 [05C]:FFFFFFFF TGED5 [05D]:FFFFFFFF TGED6 [05E]:FFFFFFFF TGED7 [05F]:FFFFFFFF TGED8 [060]:FFFFFFFF TGED9 [061]:FFFFFFFF TGED10 [062]:FFFFFFFF TGED11 [063]:FFFFFFFF TGED12 [064]:FFFFFFFF TGED13 [065]:FFFFFFFF TGED14 [066]:FFFFFFFF TGED15 [067]:FFFFFFFF TGED16 [068]:FFFFFFFF TGECB1 [069]:FFFFFFFF TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:10101010 TGE_DMVECTLO [06F]:10101010 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:06161001 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2A 1C 3E 36 2A 16 16 R0 WPS DLY 16 17 16 18 19 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 31 13 R0 RBPS DLY 27 27 27 1A 27 27 27 28 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004B 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 8B2C 0000 FB23 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 0049 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0048 0048 0048 004A 0049 0048 0048 CALDLL_RES 0616 0697 0696 0718 0719 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0E32 0C2A 081C 11BE 0FB6 0C2A 0616 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E31 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B27 0B27 0B27 079A 0B27 0BA7 0B27 0BA8 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 001F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFFF FEFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 8098 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44AC 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AA 149C 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXDVDLY_SEL 0002 0002 0001 0001 0001 0001 0001 0001 0001 RK0_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_CTENDLY_SEL 000A 000A 000A 000A 000A 000A 000A 000A 000A STRB_EN_SAMPLE 7171 7171 7171 7171 7171 7171 7171 7171 7171 PAD_DRV_SCALE 4040 4040 4040 4040 4040 4040 4040 4040 4040 PAD_TERM_SCALE 2727 2727 2727 2727 2727 2727 2727 2727 2727 PAD_DRV_CTRL 1616 1616 1616 1616 1616 1616 1616 1616 1616 PAD_TERM_CTRL =-=-=DDR3 DUMP END 0 0 Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:FFFFFFFF TGED1 [059]:FFFFFFFF TGED2 [05A]:00000000 TGED3 [05B]:00000000 TGED4 [05C]:FFFFFFFF TGED5 [05D]:FFFFFFFF TGED6 [05E]:00000000 TGED7 [05F]:00000000 TGED8 [060]:FFFFFFFF TGED9 [061]:FFFFFFFF TGED10 [062]:00000000 TGED11 [063]:00000000 TGED12 [064]:FFFFFFFF TGED13 [065]:FFFFFFFF TGED14 [066]:00000000 TGED15 [067]:00000000 TGED16 [068]:00FF00FF TGECB1 [069]:00FF00FF TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:00000000 TGE_DMVECTLO [06F]:00000000 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:16161234 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2A 1C 3E 36 2A 16 16 R0 WPS DLY 16 17 16 18 19 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 31 13 R0 RBPS DLY 27 27 27 1A 27 27 27 28 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004C 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 6840 0000 8B2C 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 0049 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0049 0048 0049 004A 0049 0048 0048 CALDLL_RES 0616 0697 0616 0718 0719 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0E32 0C2A 081C 11BE 0FB6 0C2A 0696 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E31 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B27 0B27 0B27 079A 0B27 0BA7 0B27 0BA8 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 001F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFFF FEFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 8098 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44AC 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AA 149C 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXDVDLY_SEL 0002 0002 0001 0001 0001 0001 0001 0001 0001 RK0_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_CTENDLY_SEL 000A 000A 000A 000A 000A 000A 000A 000A 000A STRB_EN_SAMPLE 7171 7171 7171 7171 7171 7171 7171 7171 7171 PAD_DRV_SCALE 4040 4040 4040 4040 4040 4040 4040 4040 4040 PAD_TERM_SCALE 2727 2727 2727 2727 2727 2827 2727 2727 2727 PAD_DRV_CTRL 1616 1616 1616 1616 1616 1616 1616 1616 1616 PAD_TERM_CTRL =-=-=DDR3 DUMP END 0 0 Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:AAAAAAAA TGED1 [059]:AAAAAAAA TGED2 [05A]:55555555 TGED3 [05B]:55555555 TGED4 [05C]:AAAAAAAA TGED5 [05D]:AAAAAAAA TGED6 [05E]:55555555 TGED7 [05F]:55555555 TGED8 [060]:AAAAAAAA TGED9 [061]:AAAAAAAA TGED10 [062]:55555555 TGED11 [063]:55555555 TGED12 [064]:AAAAAAAA TGED13 [065]:AAAAAAAA TGED14 [066]:55555555 TGED15 [067]:55555555 TGED16 [068]:55AA55AA TGECB1 [069]:55AA55AA TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:00000000 TGE_DMVECTLO [06F]:00000000 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:16161234 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2A 1C 3E 36 2A 16 16 R0 WPS DLY 16 17 16 18 19 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 31 13 R0 RBPS DLY 27 27 27 1A 27 27 27 28 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004B 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 68C0 0000 8B2C 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 8B2C 0000 FB1A 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 004A 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0048 0048 0048 004A 0049 0048 0048 CALDLL_RES 0616 0697 0616 0718 0719 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0EB2 0C2A 081C 11BE 0FB6 0C2A 0696 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E31 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B27 0B27 0B27 079A 0B27 0BA7 0B27 0BA8 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 001F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFFF FEFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 8098 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44AC 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AA 149C 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_? Stage 1 Loader 1.0.5.0 (build 54486) Built: 2016-04-05 at 06:54:55 Secure Boot Enabled on the Processor Bank: Secondary Watchdog CPLD: rev: 3.0 (30:0068|32:0004|33:0000|34:0000|35:0000) PRID: 000C1203 POWER ON RESET CFG:924C0FB2 Initialized I2C0 Controller. Initialized I2C1 Controller. SPD Rev:0x12 DIMM:0 Type:2 Speed:666MHz #Rank:1 DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM set freq:666666 DDR3: Node 0 DRAM frequency 666 MHz DDR3: Node 0 CPU frequency 1600 MHz mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9 AP3:A0CFFF0 ODTP1:10000 Board DDR VDD set to 1.5V. N:0 CH:0 additional rdlvl rdly:1 N:0 Ch:0 m:32 s:32 R OK. Rank:0 HW WLVL Passed Mask:1FF AP3:A0CFFF0 ODTP1:10000 n:0 ch:0 RTT WR:0200 ===N:0 Ch:0 m:32 s:32 RW OK. Starting address/cmd align [4T..3T] N:0 CH:0 SR ADDR/CMD:(B:00 E:63 00) 31 N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:4T OK N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:3T OK n:0 ch:0 addr mode:3T OK Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- FAIL =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:FFFFFFFF TGED1 [059]:FFFFFFFF TGED2 [05A]:FFFFFFFF TGED3 [05B]:FFFFFFFF TGED4 [05C]:FFFFFFFF TGED5 [05D]:FFFFFFFF TGED6 [05E]:FFFFFFFF TGED7 [05F]:FFFFFFFF TGED8 [060]:FFFFFFFF TGED9 [061]:FFFFFFFF TGED10 [062]:FFFFFFFF TGED11 [063]:FFFFFFFF TGED12 [064]:FFFFFFFF TGED13 [065]:FFFFFFFF TGED14 [066]:FFFFFFFF TGED15 [067]:FFFFFFFF TGED16 [068]:FFFFFFFF TGECB1 [069]:FFFFFFFF TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:10101010 TGE_DMVECTLO [06F]:10101010 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:06161001 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2C 1E 3E 36 2A 16 16 R0 WPS DLY 16 16 16 17 18 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 32 13 R0 RBPS DLY 28 27 27 26 27 27 27 29 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004C 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 8B2C 0000 FB14 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 004A 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0049 0048 0049 004A 0049 0048 0048 CALDLL_RES 0616 0616 0616 0697 0718 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0E32 0CAC 089E 11BE 0FB6 0C2A 0696 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E32 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B28 0B27 0B27 0AA6 0B27 0BA7 0B27 0BA9 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 000F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFEF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 889C 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44B0 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AC 149E 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXDVDLY_SEL 0002 0002 0001 0001 0001 0001 0001 0001 0001 RK0_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_CTENDLY_SEL 000A 000A 000A 000A 000A 000A 000A 000A 000A STRB_EN_SAMPLE 7171 7171 7171 7171 7171 7171 7171 7171 7171 PAD_DRV_SCALE 4040 4040 4040 4040 4040 4040 4040 4040 4040 PAD_TERM_SCALE 2727 2727 2727 2727 2727 2727 2727 2827 2727 PAD_DRV_CTRL 1616 1616 1616 1616 1616 1616 1616 1616 1616 PAD_TERM_CTRL =-=-=DDR3 DUMP END 0 0 Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:FFFFFFFF TGED1 [059]:FFFFFFFF TGED2 [05A]:00000000 TGED3 [05B]:00000000 TGED4 [05C]:FFFFFFFF TGED5 [05D]:FFFFFFFF TGED6 [05E]:00000000 TGED7 [05F]:00000000 TGED8 [060]:FFFFFFFF TGED9 [061]:FFFFFFFF TGED10 [062]:00000000 TGED11 [063]:00000000 TGED12 [064]:FFFFFFFF TGED13 [065]:FFFFFFFF TGED14 [066]:00000000 TGED15 [067]:00000000 TGED16 [068]:00FF00FF TGECB1 [069]:00FF00FF TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:00000000 TGE_DMVECTLO [06F]:00000000 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:16161234 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2C 1E 3E 36 2A 16 16 R0 WPS DLY 16 16 16 17 18 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 32 13 R0 RBPS DLY 28 27 27 26 27 27 27 29 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004C 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 EC40 0000 8B2C 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 004A 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0048 0048 0049 004A 0049 0048 0048 CALDLL_RES 0616 0616 0696 0697 0718 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0E32 0CAC 089E 11BE 0FB6 0C2A 0616 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E32 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B28 0B27 0B27 0AA6 0B27 0BA7 0B27 0BA9 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 000F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFEF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 889C 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44B0 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AC 149E 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXDVDLY_SEL 0002 0002 0001 0001 0001 0001 0001 0001 0001 RK0_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_CTENDLY_SEL 000A 000A 000A 000A 000A 000A 000A 000A 000A STRB_EN_SAMPLE 7171 7171 7171 7171 7171 7171 7171 7171 7171 PAD_DRV_SCALE 4040 4040 4040 4040 4040 4040 4040 4040 4040 PAD_TERM_SCALE 2727 2727 2727 2727 2727 2727 2727 2727 2727 PAD_DRV_CTRL 1616 1616 1616 1616 1616 1716 1616 1616 1616 PAD_TERM_CTRL =-=-=DDR3 DUMP END 0 0 Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS =-=-=DDR3 DUMP BEGIN 0 0 MR0:1A51 BA:0 ppd:1 wr :5 dll:0 tm :0 cas:5 rbt:0 cl :0 bl :1 MR1:0216 BA:1 Qoff :0 TDQS :0 WLVL :0 RTT_NOM:1 0 1 DIC :0 1 DLL :0 MR2:0210 BA:2 RTT_WR:1 SRT :0 ASR :0 CWL :2 PASR :0 MR3:0000 BA:3 MPR:0 Addr:0 ZQL:0400 BA:0 ZQL:0400 BA:0 RDRD DF RANK: 0x00000004 RDWR SM RANK: 0x00000005 RDWR DF RANK: 0x00000006 WRRD DF RANK: 0x00000004 WRWR DF RANK: 0x00000004 WRRD SM RANK: 0x00000007 SMTY_SMRK_TA: 0x00000004 RDRD_DFRK_TA: 0x00000008 RDWR_SMRK_TA: 0x0000000b RDWR_DFRK_TA: 0x0000000c WRRD_DFRK_TA: 0x00000006 WRWR_DFRK_TA: 0x00000009 WRRD_SMRK_TA: 0x00000009 WRRD_SMRK_TA_LCL: 0x00000010 [000]:00020169 SHADOWMR [001]:00000216 RK0SMR1 [002]:00000216 RK1SMR1 [003]:00000216 RK2SMR1 [004]:00000216 RK3SMR1 [005]:01000404 BP1 [006]:14040921 BP2 [007]:00010418 BP3 [008]:145000AE BP4 [009]:04050905 BP5 [00A]:07060504 BP6 [00B]:20010040 BP7 [00C]:00B4200A BP8 [00D]:00861A80 BP9 [00E]:20027100 BP10 [00F]:000032C8 BP11 [010]:64081454 BP12 [011]:42000B45 BP13 [012]:00000400 BP14 [013]:2507281F BP15 [014]:00030300 AP1 [015]:100A0703 AP2 [016]:0A0CFFF0 AP3 [017]:00010000 ODTP1 [018]:00000046 ODTP2 [019]:00000000 PZN1 [01A]:00000000 PZN2 [01B]:00000000 PZN3 [01C]:00000000 PZN4 [01D]:00000000 ECCLOG1 [01E]:00000000 ECCLOG2 [01F]:F8021021 DIS1 [020]:F8000031 DIS2 [021]:F8021611 DIS3 [022]:F81A5101 DIS4 [023]:5E040081 DIS5 [024]:AE040081 DIS6 [025]:FA040081 RFS1 [026]:F9000001 RFS2 [027]:0F000080 RFS3 [028]:0F000080 RFS4 [029]:FA040081 SRE1 [02A]:F1000001 SRE2 [02B]:0F000080 SRE3 [02C]:0F000080 SRE4 [02D]:5E000081 ZQC1 [02E]:AE000081 ZQC2 [02F]:F7000081 PDE1 [030]:07000080 PDE2 [031]:FF000081 PDX1 [032]:0F000080 PDX2 [033]:F8021021 UCS1 [034]:F8000031 UCS2 [035]:F8021611 UCS3 [036]:F81A5101 UCS4 [037]:5E040081 UCS5 [038]:AE040081 UCS6 [039]:000E1102 DP1 [03A]:0A0C090B DP2 [03B]:091A1C0C DP3 [03C]:04060709 DP4 [03D]:0E100804 DP5 [03E]:03641011 DP6 [03F]:070C0703 DP7 [040]:0A101008 DP8 [041]:1E072313 DP9 [042]:00040016 DP10 [043]:1F160120 DP11 [044]:0000AE01 DP12 [045]:0E00144D DP13 [046]:250096A2 DP14 [047]:000445C0 DP15 [048]:201E1C00 NSL [049]:0004021B CM0 [04A]:10502090 CM1 [04B]:00000000 UCSC [04C]:0473F000 WLLIM [04D]:00000812 WLCTL [04E]:000000AA CST [04F]:00000000 GPCE [050]:00000000 PCC0 [051]:00000000 PCV0 [052]:00000000 PCC1 [053]:00000000 PCV1 [054]:00000000 PCC2 [055]:00000000 PCV2 [056]:00000000 PCC3 [057]:00000000 PCV3 [058]:AAAAAAAA TGED1 [059]:AAAAAAAA TGED2 [05A]:55555555 TGED3 [05B]:55555555 TGED4 [05C]:AAAAAAAA TGED5 [05D]:AAAAAAAA TGED6 [05E]:55555555 TGED7 [05F]:55555555 TGED8 [060]:AAAAAAAA TGED9 [061]:AAAAAAAA TGED10 [062]:55555555 TGED11 [063]:55555555 TGED12 [064]:AAAAAAAA TGED13 [065]:AAAAAAAA TGED14 [066]:55555555 TGED15 [067]:55555555 TGED16 [068]:55AA55AA TGECB1 [069]:55AA55AA TGECB2 [06A]:00000000 TGEA1 [06B]:00004000 TGEA2 [06C]:04000000 TGECNT [06D]:04000000 TGE_RDRETCNT [06E]:00000000 TGE_DMVECTLO [06F]:00000000 TGE_DMVECTHI [070]:00000000 TGE_CBMVECT [071]:00000001 TGECON [072]:00000000 SCR0 [073]:00000000 SCR1 [074]:00000000 SCR2 [075]:00000000 SCR3 [076]:16161234 PRG DDR3 0.0: Address Mode : 3T (Addr Delay:2 AL:2 CS Delay:1) Additional RL Delay : 1 cycle(s) Single-Rank load DLL: 0x31/0x80 cycle Multi-Rank load DLL: 0x3F/0x80 cycle Wr DQS pre-launch : 1 cycle(s) R0 WLV CDLY 03 03 03 03 02 02 02 02 03 R0 WLV FDLY 3C 32 2C 1E 3E 36 2A 16 16 R0 WPS DLY 16 16 16 17 18 16 17 17 18 R0 RLV CDLY 03 03 02 02 02 02 01 01 02 R0 RLV FDLY 07 00 30 26 07 00 39 32 13 R0 RBPS DLY 28 27 27 26 27 27 27 29 27 DQS0_CALDLL_BASE = 0x000 DQS1_CALDLL_BASE = 0x040 DQS2_CALDLL_BASE = 0x080 DQS3_CALDLL_BASE = 0x0C0 DQS4_CALDLL_BASE = 0x100 DQS5_CALDLL_BASE = 0x140 DQS6_CALDLL_BASE = 0x180 DQS7_CALDLL_BASE = 0x1C0 DQS8_CALDLL_BASE = 0x200 MRCMD_CALDLL_BASE = 0x240, 004C 12BF 7171 2727 0004 PAD0_CAL_BASE = 0x280, 1FC0 102F 0000 8B2C 0000 8B2C 0B2C 0000 PAD1_CAL_BASE = 0x2C0, 1FC0 102F 0000 ECC0 0000 8B2C 0B2C 0000 PAD2_CAL_BASE = 0x300, 1FC0 102F 0000 8B2C 0000 FB27 0B2C 0000 SRCMD_CALDLL_BASE = 0x340, 004A 0E31 7171 2727 0004 --------------------------------------------------- 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 --------------------------------------------------- 0047 0048 0048 0048 0048 004A 0049 0048 0048 CALDLL_RES 0616 0616 0616 0697 0718 0696 0697 0697 0718 SHR_TXPSDLL_CTRL 10BC 0EB2 0CAC 089E 11BE 0FB6 0C2A 0616 0616 RK0_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLL_CTRL 0207 0000 0DB0 0AA6 0207 0000 10B9 0E32 0593 RK0_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXSEDLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXSEDLL_CTRL 0B28 0B27 0B27 0AA6 0B27 0BA7 0B27 0BA9 0B27 RK0_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK1_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK2_RXPSDLL_CTRL 0920 0920 0920 0920 0920 09A0 0920 0920 0920 RK3_RXPSDLL_CTRL 0000 0007 000F 00FF FFFF FFF8 FFC0 F800 03FF SHR_WLRSLT_DATA_LO FFFE FFF0 FFC0 FE00 0000 0003 001F 03FF F800 SHR_WLRSLT_DATA_HI FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_LO FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_VLD_HI FFFE FFFF FFEF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_LO FFFF FFFF FFDF FFFF FFFF FFFF FFFF FFFF FFFF SHR_WLRSLT_PURE_HI 0008 0008 0008 0008 0008 0008 0008 0008 0008 SHR_WLED_CFG 80B8 88B0 80A8 889C 803C 7034 5828 8914 8894 SHR_WLED_FVR 4500 44B4 44B0 44A0 4480 4438 442C 4518 4498 SHR_WLED_NVR 14BC 14B2 14AC 149E 143E 1436 142A 1516 1496 SHR_WLED_ALN 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ0_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ1_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ2_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ3_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ4_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ5_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ6_MICRODLL_CTRL 0000 0000 0000 0000 0000 0000 0000 0000 0000 DQ7_MICRODLL_CTRL 0003 0003 0003 0003 0002 0002 0002 0002 0003 RK0_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_TXWLDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_TXWLDLY_SEL 0008 0008 0004 0004 0004 0004 0002 0002 0004 RK0_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_RXSEDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_RXSEDLY_SEL 0005 0005 0005 0005 0005 0005 0005 0005 0005 RK0_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK1_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK2_RXDVDLY_SEL 0000 0000 0000 0000 0000 0000 0000 0000 0000 RK3_RXDVDLY_SEL 0002 0002 0001 0001 0001 0001 0001 0001 0001 RK0_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK1_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK2_CTENDLY_SEL 0001 0001 0001 0001 0001 0001 0001 0001 0001 RK3_CTENDLY_SEL 000A 000A 000A 000A 000A 000A 000A 000A 000A STRB_EN_SAMPLE 7171 7171 7171 7171 7171 7171 7171 7171 7171 PAD_DRV_SCALE 4040 4040 4040 4040 4040 4040 4040 4040 4040 PAD_TERM_SCALE 2727 2727 2727 2727 2727 2827 2727 2727 2727 PAD_DRV_CTRL 1616 1616 1616 1616 1616 1616 1616 1616 1616 PAD_TERM_CTRL =-=-=DDR3 DUMP END 0 0 Stage 1 Loader 1.0.5.0 (build 54486) Built: 2016-04-05 at 06:54:55 Secure Boot Enabled on the Processor Bank: Secondary Watchdog CPLD: rev: 3.0 (30:0068|32:0004|33:0000|34:0000|35:0000) PRID: 000C1203 POWER ON RESET CFG:924C0FB2 Initialized I2C0 Controller. Initialized I2C1 Controller. SPD Rev:0x12 DIMM:0 Type:2 Speed:666MHz #Rank:1 DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM set freq:666666 DDR3: Node 0 DRAM frequency 666 MHz DDR3: Node 0 CPU frequency 1600 MHz mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9 AP3:A0CFFF0 ODTP1:10000 Board DDR VDD set to 1.5V. N:0 CH:0 additional rdlvl rdly:1 N:0 Ch:0 m:32 s:32 R OK. Rank:0 HW WLVL Passed Mask:1FF AP3:A0CFFF0 ODTP1:10000 n:0 ch:0 RTT WR:0200 ===N:0 Ch:0 m:32 s:32 RW OK. Starting address/cmd align [4T..3T] N:0 CH:0 SR ADDR/CMD:(B:00 E:63 00) 31 N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:4T OK N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F n:0 ch:0 addr mode:3T OK n:0 ch:0 addr mode:3T OK Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS Node:0 Ch:0 TGE Set Memory:4096 MB value:00 00 -- PASS DDR3 Initialization Passed. NBU0 DRAM BAR0 base: 00000000 limit: 0013f000 xlate: 00000001 node: 00000000 ( 0 MB -> 320 MB, size: 320 MB) NBU0 DRAM BAR1 base: 001d0000 limit: 00bff000 xlate: 00090001 node: 00000000 ( 464 MB -> 3072 MB, size: 2608 MB) NBU0 DRAM BAR2 base: 00e00000 limit: 0128f000 xlate: 00290001 node: 00000000 ( 3584 MB -> 4752 MB, size: 1168 MB) Hit Ctrl + X keys to stop autoboot: 0 CPBoot image is signed Verifying CPBoot checksum... CPBoot check passed Signer Cert OK Policy Cert OK RSA signature verified. ## Starting application at 0x8C100000 ... CPBoot 1.0.6.0 (build 54486) Built: 2016-04-05 at 06:40:23