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Controller stuck on booting, no cpboot prompt

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  • 1.  Controller stuck on booting, no cpboot prompt

    Posted Jul 27, 2022 03:51 AM
    Dear Experts,

    This is my lab controller and not under TAC support. Any advise would be highly appreciated. Below are the problems

    1) As soon as i power on my 7010 controller, it starts giving below messages non stop
    2) i was able to enter cpxload> prompt but as soon as i type something, it starts doing the same thing without letting me complete
    3) there is no cpboot prompt, i waited for long, recorded the session through putty and checked but it never asked for cpboot
    4) Any idea on how to recover will be a great help

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK


    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:

    CPBoot 1.0.3.0 (build 51906)
    Built: 2015-10-01 at 03:23:49

    DRAM: 4 GB
    Detected [XLP208 Rev B1 (Secure Boot) ] (6a|6a)
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83bf)
    Flash: 16 MB
    PCIE (B0:D01:F0) : Link up (Gen(1))
    Bank: Primary
    Board: A7010
    CPU: XLP208 Rev B1 (Secure Boot)
    Clock: Core 800 MHz / SoC 800 MHz (30cc0ff2)


    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:00 00 -- PASS

    DDR3 Initialization Passed.
    NBU0 DRAM BAR0 base: 00000000 limit: 0013f000 xlate: 00000001 node: 00000000 ( 0 MB -> 320 MB, size: 320 MB)
    NBU0 DRAM BAR1 base: 001d0000 limit: 00bff000 xlate: 00090001 node: 00000000 ( 464 MB -> 3072 MB, size: 2608 MB)
    NBU0 DRAM BAR2 base: 00e00000 limit: 0128f000 xlate: 00290001 node: 00000000 ( 3584 MB -> 4752 MB, size: 1168 MB)
    Hit Ctrl + X keys to stop autoboot: 2  1  0

    CPBoot image is signed
    Verifying CPBoot checksum...
    CPBoÿ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS


    Staÿ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFþ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primaò

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:00 00 -- PASS

    DDR3 Initialization Passed.
    NBU0 DRAM BAR0 base: 00000000 limit: 0013f000 xlate: 00000001 node: 00000000 ( 0 MB -> 320 MB, size: 320 MB)
    NBU0 DRAM BAR1 base: 001d0000 limit: 00bff000 xlate: 00090001 node: 00000000 ( 464 MB -> 3072 MB, size: 2608 MB)
    NBU0 DRAM BAR2 base: 00e00000 limit: 0128f000 xlate: 00290001 node: 00000000 ( 3584 MB -> 4752 MB, size: 1168 MB)
    Hit Ctrl + X keys to stop autoboot: 2  1  0
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload#
    cpxload# printen

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK


    Stage

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:00þ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2ø Š

    Stage 1 Loader 1.0þ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:ð

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-ÿ

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83bf)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:00 00 -- PASS

    DDR3 Initialization Passed.
    NBU0 DRAM BAR0 base: 00000000 limit: 0013f000 xlate: 00000001 node: 00000000 ( 0 MB -> 320 MB, size: 320 MB)
    NBU0 DRAM BAR1 base: 001d0000 limit: 00bff000 xlate: 00090001 node: 00000000 ( 464 MB -> 3072 MB, size: 2608 MB)
    NBU0 DRAM BAR2 base: 00e00000 limit: 0128f000 xlate: 00290001 node: 00000000 ( 3584 MB -> 4752 MB, size: 1168 MB)
    Hit Ctrl + X keys to stop autoboot: 2  1  0

    CPBoot image is signed
    Verifying CPBoot checksum...
    CPBoot check passed
    Signer Cert OK
    Policy Cert OK
    RSA signature verified.
    ## Starting application at 0x8C100000 ...


    CPBoot 1.0.3.0 (build 51906)
    Built: 2015-10-01 at 03:23:49

    DRAM: 4 GB
    Detected [XLP208 Rev B1 (Secure Boot) ] (6a|6a)
    CPLD: rev: 3.0 (30:8080|32:0001|33:5c37|34:83df|35:83df)
    Flash: 16 MB
    PCIE (B0:D01:F0) : Link up (Gen(1))
    Bank: Primary
    Board: A7010
    CPU: XLP208 Rev B1 (Secure Boot)
    Clock: Core 800 MHz / SoC 800 MHz (30cc0ff2)
    Net: ge-0, ge-2, ge-3, ge-4, ge-1
    Hit Ctrl + X key to stop autoboot: 2  1

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9
    AP3:A0CFFF0 ODTP1:10000
    Board DDR VDD set to 1.5V.
    N:0 CH:0 additional rdlvl rdly:1
    N:0 Ch:0 m:32 s:32 R OK.
    Rank:0 HW WLVL Passed Mask:1FF
    AP3:A0CFFF0 ODTP1:10000
    n:0 ch:0 RTT WR:0200
    ===N:0 Ch:0 m:32 s:32 RW OK.
    Starting address/cmd align [4T..3T]
    N:0 CH:0 SR ADDR/CMD:(B:00 E:60 00) 30
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:4T OK
    N:0 CH:0 MR ADDR/CMD:(00 7F 00) 3F
    n:0 ch:0 addr mode:3T OK
    n:0 ch:0 addr mode:3T OK
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF FF -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:FF 00 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:AA 55 -- PASS
    Node:0 Ch:0 TGE Set Memory:4096 MB value:00 00 -- PASS

    DDR3 Initialization Passed.
    NBU0 DRAM BAR0 base: 00000000 limit: 0013f000 xlate: 00000001 node: 00000000 ( 0 MB -> 320 MB, size: 320 MB)
    NBU0 DRAM BAR1 base: 001d0000 limit: 00bff000 xlate: 00090001 node: 00000000 ( 464 MB -> 3072 MB, size: 2608 MB)
    NBU0 DRAM BAR2 base: 00e00000 limit: 0128f000 xlate: 00290001 node: 00000000 ( 3584 MB -> 4752 MB, size: 1168 MB)
    Hit Ctrl + X keys to stop autoboot: 2  0
    cpxload#

    Stage 1 Loader 1.0.4.0 (build 51906)
    Built: 2015-10-01 at 03:31:05

    Secure Boot Enabled on the Processor

    Bank: Primary
    CPLD: rev: 3.0 (30:8080|32:0001|33:6f07|34:801f|35:83df)
    PRID: 000C1203
    POWER ON RESET CFG:30CC0FF2
    Initialized I2C0 Controller.
    Initialized I2C1 Controller.
    SPD Rev:0x11 DIMM:0 Type:2 Speed:666MHz #Rank:1
    DDR3: Node 0 Channel 0 Mem size = 4096 MB UDIMM
    set freq:666666
    DDR3: Node 0 DRAM frequency 666 MHz
    DDR3: Node 0 CPU frequency 800 MHz
    mtb_ps:125 clock:1500 trc:33 trcd:9 trp:9


  • 2.  RE: Controller stuck on booting, no cpboot prompt

    EMPLOYEE
    Posted Jul 27, 2022 08:34 AM
    Because the boot sequence restarts every time, but at a different point in the boot process, I would expect a hardware issue like with the power supply or cooling system. Does the cooling fan spin up? It does not even reach the apboot... but the boot process looks good, it's just interrupted and starts over from the beginning.

    Quite confident that if this controller was under contract, it would be replaced (RMA). It doesn't really look good unfortunately.

    ------------------------------
    Herman Robers
    ------------------------
    If you have urgent issues, always contact your Aruba partner, distributor, or Aruba TAC Support. Check https://www.arubanetworks.com/support-services/contact-support/ for how to contact Aruba TAC. Any opinions expressed here are solely my own and not necessarily that of Hewlett Packard Enterprise or Aruba Networks.

    In case your problem is solved, please invest the time to post a follow-up with the information on how you solved it. Others can benefit from that.
    ------------------------------